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? semiconductor components industries, llc, 2005 october, 2005 ? rev. 7 1 publication order number: mc34166/d mc34166, mc33166 3.0 a, step?up/down/ inverting switching regulators the mc34166, mc33166 series are high performance fixed frequency power switching regulators that contain the primary functions required for dc?to?dc converters. this series was specifically designed to be incorporated in step?down and voltage?inverting configurations with a minimum number of external components and can also be used cost effec tively in step?up applications. these devices consist of an internal temperature compensated reference, fixed frequency oscillator with on?chip timing components, latching pulse width modulator for single pulse metering, high gain error amplifier, and a high current output switch. protective features consist of cycle?by?cycle current limiting, undervoltage lockout, and thermal shutdown. also included is a low power standby mode that reduces power supply current to 36 a. features ? output switch current in excess of 3.0 a ? fixed frequency oscillator (72 khz) with on?chip timing ? provides 5.05 v output without external resistor divider ? precision 2% reference ? 0% to 95% output duty cycle ? cycle?by?cycle current limiting ? undervoltage lockout with hysteresis ? internal thermal shutdown ? operation from 7.5 v to 40 v ? standby mode reduces power supply current to 36 a ? economical 5?lead to?220 package with two optional leadforms ? also available in surface mount d 2 pak package ? moisture sensitivity level (msl) equals 1 ? pb?free packages are available figure 1. simplified block diagram (step down application) ea v o i limit v in 4 2 s q r uvlo 3 5 l 5.05 v/ 3.0 a reference thermal pwm oscillator 1 this device contains 143 active transistors. to?220 th suffix case 314a see detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. ordering information 1 5 marking diagrams 1 5 to?220 tv suffix case 314b 1 5 heatsink surface connected to pin 3 to?220 t suffix case 314d pin 1. voltage feedback input 2. switch output 3. ground 4. input voltage/v cc 5. compensation/standby d 2 pak d2t suffix case 936a heatsink surface (shown as terminal 6 in case outline drawing) is connected to pin 3 x = 3 or 4 a = assembly location wl = wafer lot y = year ww = work week g = pb?free package mc 3x166t awlywwg mc 3x166t awlywwg mc 3x166t awlywwg 1 5 mc 3x166t awlywwg 15 http://onsemi.com
mc34166, mc33166 http://onsemi.com 2 ordering information device operating temperature range package shipping ? mc33166d2t t a = ?40 to +85 c d 2 pak ? surface mount 50 units/rail mc33166d2tg d 2 pak ? surface mount (pb?free) mc33166d2tr4 d 2 pak ? surface mount 800 / tape & reel mc33166d2tr4g d 2 pak ? surface mount (pb?free) mc33166t to?220 ? straight lead 50 units/rail mc33166tg to?220 ? straight lead (pb?free) mc33166th to?220 ? horizontal mount mc33166thg to?220 ? horizontal mount (pb?free) mc33166tv to?220 ? vertical mount MC33166TVG to?220 ? vertical mount (pb?free) mc34166d2t t a = 0 to +70 c d 2 pak ? surface mount mc34166d2tg d 2 pak ? surface mount (pb?free) mc34166d2tr4 d 2 pak ? surface mount 800 / tape & reel mc34166d2tr4g d 2 pak ? surface mount (pb?free) mc34166t to?220 ? straight lead 50 units/rail mc34166tg to?220 ? straight lead (pb?free) mc34166th to?220 ? horizontal mount mc34166thg to?220 ? horizontal mount (pb?free) mc34166tv to?220 ? vertical mount mc34166tvg to?220 ? vertical mount (pb?free) ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. maximum ratings rating symbol value unit power supply input voltage v cc 40 v switch output voltage range v o(switch) ?1.5 to + v in v voltage feedback and compensation input voltage range v fb, v comp ?1.0 to + 7.0 v power dissipation case 314a, 314b and 314d (t a = +25 c) p d internally limited w thermal resistance, junction?to?ambient ja 65 c/w thermal resistance, junction?to?case jc 5.0 c/w case 936a (d 2 pak) (t a = +25 c) p d internally limited w thermal resistance, junction?to?ambient ja 70 c/w thermal resistance, junction?to?case jc 5.0 c/w operating junction temperature t j +150 c operating ambient temperature (note 2) mc34166 mc33166 t a 0 to + 70 ? 40 to + 85 c storage temperature range t stg ? 65 to +150 c maximum ratings are those values beyond which device damage can occur. maximum ratings applied to the device are individual str ess limit values (not normal operating conditions) and are not valid simultaneously. if these limits are exceeded, device functional operation i s not implied, damage may occur and reliability may be affected. 1. this device series contains esd protection and exceeds the following tests: human body model 2000 v per mil?std?883, method 3015. machine model method 200 v. 2. t low = 0 c for mc34166 t high = + 70 c for mc34166 = ? 40 c for mc33166 = + 85 c for mc33166
mc34166, mc33166 http://onsemi.com 3 electrical characteristics (v cc = 12 v, for typical values t a = +25 c, for min/max values t a is the operating ambient temperature range that applies [notes 3, 4], unless otherwise noted.) characteristic symbol min typ max unit oscillator frequency (v cc = 7.5 v to 40 v) t a = +25 c t a = t low to t high f osc 65 62 72 ? 79 81 khz error amplifier voltage feedback input threshold t a = +25 c t a = t low to t high v fb(th) 4.95 4.85 5.05 ? 5.15 5.2 v line regulation (v cc = 7.5 v to 40 v, t a = +25 c) reg line ? 0.03 0.078 %/v input bias current (v fb = v fb(th) + 0.15 v) i ib ? 0.15 1.0 a power supply rejection ratio (v cc = 10 v to 20 v, f = 120 hz) psrr 60 80 ? db output voltage swing high state (i source = 75 a, v fb = 4.5 v) low state (i sink = 0.4 ma, v fb = 5.5 v) v oh v ol 4.2 ? 4.9 1.6 ? 1.9 v pwm comparator duty cycle maximum (v fb = 0 v) minimum (v comp = 1.9 v) dc (max) dc (min) 92 0 95 0 100 0 % switch output output voltage source saturation (v cc = 7.5 v, i source = 3.0 a) v sat ? (v cc ?1.5) (v cc ?1.8) v off?state leakage (v cc = 40 v, pin 2 = gnd) i sw(off) ? 0 100 a current limit threshold i pk(switch) 3.3 4.3 6.0 a switching times (v cc = 40 v, i pk = 3.0 a, l = 375 h, t a = +25 c) output voltage rise time output voltage fall time t r t f ? ? 100 50 200 100 ns undervoltage lockout startup threshold (v cc increasing, t a = +25 c) v th(uvlo) 5.5 5.9 6.3 v hysteresis (v cc decreasing, t a = +25 c) v h(uvlo) 0.6 0.9 1.2 v total device power supply current (t a = +25 c ) standby (v cc = 12 v, v comp < 0.15 v) operating (v cc = 40 v, pin 1 = gnd for maximum duty cycle) i cc ? ? 36 31 100 55 a ma 3. low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible. 4. t low = 0 c for mc34166 t high = + 70 c for mc34166 = ? 40 c for mc33166 = + 85 c for mc33166
mc34166, mc33166 http://onsemi.com 4 figure 2. voltage feedback input threshold versus temperature figure 3. voltage feedback input bias current versus temperature figure 4. error amp open loop gain and phase versus frequency figure 5. error amp output saturation versus sink current figure 6. oscillator frequency change versus temperature figure 7. switch output duty cycle versus compensation voltage ?20 a vol , open loop voltage gain (db) 10 m 10 f, frequency (hz) 0 30 60 90 120 150 180 100 1.0 k 10 k 100 k 1.0 m 0 20 40 60 80 100 , excess phase (degrees) gain phase ?12 ?55 t a , ambient temperature ( c) ?25 0 25 50 75 100 125 ?8.0 ?4.0 0 4.0 , oscillator frequency change (%) osc f 4.85 v fb(th) , voltage feedback input threshold (v) t a , ambient temperature ( c) 4.93 5.01 5.09 5.17 5.25 ?55 ?25 0 25 50 75 100 125 v cc = 12 v 0 i ib , input bias current (na) t a , ambient temperature ( c) 20 40 60 80 100 ?55 ?25 0 25 50 75 100 125 v sat , output saturation voltage (v) 2.0 0 i sink , output sink current (ma) 0.4 0.8 1.2 1.6 0 0.4 0.8 1.2 1.6 2.0 dc, switch output duty cycle (%) 1.5 v comp , compensation voltage (v) 2.0 2.5 3.0 3.5 4.0 0 20 40 60 80 100 4.5 v cc = 12 v v comp = 3.25 v r l = 100 k t a = +25 c v fb(th) max = 5.15 v v fb(th) min = 4.95 v v fb(th) typ = 5.05 v v cc = 12 v v fb = v fb(th) v cc = 12 v v fb = 5.5 v t a = +25 c v cc = 12 v t a = +25 c v cc = 12 v
mc34166, mc33166 http://onsemi.com 5 figure 8. switch output source saturation versus source current figure 9. negative switch output voltage versus temperature figure 10. switch output current limit threshold versus temperature figure 11. standby supply current versus supply voltage figure 12. undervoltage lockout threshold versus temperature figure 13. operating supply current versus supply voltage 4.5 ?55 t a , ambient temperature ( c) ?25 0 25 50 75 100 125 5.0 5.5 6.0 6.5 , undervoltage lockout threshold (v) th(uvlo) v ?2.5 i source , switch output source current (a) ?2.0 ?1.5 ?1.0 ?0.5 0 0 2.0 3.0 4.0 5.0 t a , ambient temperature ( c) ?55 ?25 0 25 50 75 100 125 ?3.0 v sat , switch output source saturation (v ) ?1.0 ?0.8 ?0.6 ?0.4 ?0.2 0 ?1.2 v sw , switch output voltage (v) v cc = 12 v pin 5 = 2.0 v pins 1, 3 = gnd pin 2 driven negative gnd 3.9 4.1 4.3 4.5 4.7 , current limit threshold (a) pk(switch) i ?55 ?25 0 25 50 75 100 125 v cc = 12 v pins 1, 2, 3 = gnd 0 40 80 120 160 , supply current ( cc i 0 v cc , supply voltage (v) 10 20 30 40 pin 4 = v cc pins 1, 3, 5 = gnd pin 2 open t a = +25 c a) 4.0 , supply current (ma) cc i 0 0 v cc , supply voltage (v) 10 20 30 40 10 20 30 40 pin 4 = v cc pins 1, 3 = gnd pins 2, 5 open t a = +25 c t a , ambient temperature ( c) 1.0 t a = +25 c v cc i sw = 100 a i sw = 10 ma startup threshold v cc increasing turn?off threshold v cc decreasing
mc34166, mc33166 http://onsemi.com 6 figure 14. mc34166 representative block diagram + 4 2 1 5 3 + c f r f r 1 c o v o r 2 120 error amp 5.05 v reference thermal shutdown oscillator s r q pulse width modulator c t pwm latch gnd compensation 100 a undervoltage lockout voltage feedback input l switch output current sense v in c in input voltage/v cc sink only positive true logic = figure 15. timing diagram 4.1 v timing capacitor c t compensation 2.3 v on off switch output +
mc34166, mc33166 http://onsemi.com 7 introduction the mc34166, mc33166 series are monolithic power switching regulators that are optimized for dc?to?dc converter applications. thes e devices operate as fixed frequency, voltage mode regulators containing all the active functions required to direc tly implement step?down and voltage?inverting converters with a minimum number of external components. they can also be used cost effectively in step?up converter applications. potential markets include automotive, computer, indus trial, and cost sensitive consumer products. a description of each section of the device is given below with the representative block diagram shown in figure 14. oscillator the oscillator frequency is internally programmed to 72 khz by capacitor c t and a trimmed current source. the charge to discharge ratio is controlled to yield a 95% maximum duty cycle at the switch output. during the discharge of c t , the oscillator generates an internal blanking pulse that holds the inverting input of the and gate high, disabling the output switch transistor. the nominal oscillator peak and valley thresholds are 4.1 v and 2.3 v respectively. pulse width modulator the pulse width modulator consists of a comparator with the oscillator ramp voltage app lied to the noninverting input, while the error amplifier output is applied into the inverting input. output switch conduction is initiated when c t is discharged to the oscillator valley voltage. as c t charges to a voltage that exceeds the erro r amplifier output, the latch resets, terminating output transistor conduction for the duration of the oscillator ramp?up period. this pwm/latch combination prevents multiple output pulses during a given oscillator clock cycle. figures 7 and 15 illustrate the switch output duty cycle versus the compensation voltage. current sense the mc34166 series utilizes cycle?by?cycle current limiting as a means of protecting the output switch transistor from overstress. each on?cycle is treated as a separate situation. current limiting is implemented by monitoring the output switch transistor current buildup during conduction, and upon sensing an overcurrent c ondition, immediately turning off the switch for the duration of the oscillator ramp?up period. the collector current is converted to a voltage by an internal trimmed resistor and compared against a reference by the current sense comparator. when the current limit threshold is reached, the comparator reset s the pwm latch. the current limit threshold is typically set at 4.3 a. figure 10 illustrates switch output current limit threshold versus temperature. error amplifier and reference a high gain error amplifier is provided with access to the inverting input and output. this amplifier features a typical dc voltage gain of 80 db, and a unity gain bandwidth of 600 khz with 70 degrees of phase margin (figure 4). the noninverting input is biased to the internal 5.05 v reference and is not pinned out. the reference has an accuracy of 2.0% at room temperature. to provide 5.0 v at the load, the reference is programmed 50 mv above 5.0 v to compensate for a 1.0% voltage drop in the cable and connector from the converter output. if the converter design requires an output voltage greater than 5.05 v, resistor r 1 must be added to form a divider network at the feedback input as shown in figures 14 and 19. the equation for determining the output voltage with the divider network is: v out 5.05 r 2 r 1 1 external loop compensation is required for converter stability. a simple low?pass filte r is formed by connecting a resistor (r 2 ) from the regulated output to the inverting input, and a series resistor?capacitor (r f , c f ) between pins 1 and 5. the compensation network component values shown in each of the applications circuits were selected to provide stability over the tested operating conditions. the step?down converter (figure 19) is the easiest to compensate for stability. the step?up (figure 21) and voltage?inverting (figure 23) configurations operate as continuous conduction flyback converters, and are more difficult to compensate. the simplest way to optimize the compensation network is to observe the response of the output voltage to a step load change, while adjusting r f and c f for critical damping. the final circuit should be verified for stability under four boundary conditions. these conditions are minimum and maximum input voltages, with minimum and maximum loads. by clamping the voltage on the error amplifier output (pin 5) to less than 150 mv, the internal circuitry will be placed into a low power sta ndby mode, reducing the power supply current to 36 a with a 12 v supply voltage. figure 11 illustrates the standby supply current versus supply voltage. the error amplifier output has a 100 a current source pullup that can be used to implement soft?start. figure 18 shows the current source charging capacitor c ss through a series diode. the diode disconnects c ss from the feedback loop when the 1.0 m resistor ch arges it above the operating range of pin 5. switch output the output transistor is designed to switch a maximum of 40 v, with a minimum peak collector current of 3.3 a. when configured for step?down or voltage?inverting applications, as in figures 19 and 23, the inductor will forward bias the output rectifier when the switch turn s off. rectifiers with a high forward voltage drop or long turn?on delay time should not be used. if the emitter is allowed to go sufficiently negative, collector current will flow, causing additional device heating and reduced conversion efficiency. figure 9 shows that by clamping the emitter to 0.5 v, the collector current will be in the range of 100 a over temperature. a 1n5822 or
mc34166, mc33166 http://onsemi.com 8 equivalent schottky barrier rectifier is recommended to fulfill these requirements. undervoltage lockout an undervoltage lockout comparator has been incorporated to guarantee that the integrated circuit is fully functional before the output st age is enabled. the internal 5.05 v reference is monitore d by the comparator which enables the output stage when v cc exceeds 5.9 v. to prevent erratic output switching as the threshold is crossed, 0.9 v of hysteresis is provided. thermal protection internal thermal shutdown circuitry is provided to protect the integrated circuit in the event that the maximum junction temperature is exceeded. when activated, typically at 170 c, the latch is forced into a ?res et? state, disabling the output switch. this feature is provi ded to prevent catastrophic failures from accidental device overheating. it is not intended to be used as a substitute for proper heatsinking. the mc34166 is contained in a 5?lead to?220 type package. the tab of the package is commo n with the center pin (pin 3) and is normally connected to ground. design considerations do not attempt to construc t a converter on wire?wrap or plug?in prototype boards. special care should be taken to separate ground paths from signal currents and ground paths from load currents. al l high current loops should be kept as short as possible using heavy copper runs to minimize ringing and radiated emi. for best operation, a tight component layout is recommended. capacitors c in , c o , and all feedback components should be placed as close to the ic as physically possible. it is also imperative that the schottky diode connected to the switch output be located as close to the ic as possible. figure 16. low power standby circuit figure 17. over voltage shutdown circuit figure 18. soft?start circuit 1 5 r 1 120 error amp compensation 100 a i = standby mode v shutdown = v zener + 0.7 t soft?start 35,000 c ss c ss d 1 d 2 1.0 m v in 1 5 r 1 120 error amp compensation 100 a 1 5 r 1 120 error amp compensation 100 a + + +
mc34166, mc33166 http://onsemi.com 9 4 2 1 5 3 + c f r f r 1 c o 2200 v o 5.05 v/3.0 a r 2 ea reference thermal oscillator s r q pwm uvlo ilimit v in 12 v c in 330 + 6.8 k 68 k 0.1 q 1 d 1 1n5822 l 190 h + + + test conditions results line regulation v in = 8.0 v to 36 v, i o = 3.0 a 5.0 mv = 0.05% load regulation v in = 12 v, i o = 0.25 a to 3.0 a 2.0 mv = 0.02% output ripple v in = 12 v, i o = 3.0 a 10 mv pp short circuit current v in = 12 v, r l = 0.1 4.3 a efficiency v in = 12 v, i o = 3.0 a 82.8% l = coilcraft m1496?a or general magnetics technology gmt?0223, 42 turns of #16 awg on magnetics inc. 58350?a2 core. heatsink = aavid engineering inc. 5903b, or 5930b. the step?down converter application is shown in figure 19. the output switch transistor q 1 interrupts the input voltage, generating a squarewave at the lc o filter input. the filter averages the squarewaves, producing a dc output voltage that can be set to any level between v in and v ref by controlling the percent conduction time of q 1 to that of the total oscillator cycle time. if the converter design requires an output voltage greater than 5.05 v, resistor r 1 must be added to form a divider network at the feedback input. figure 19. step?down converter (bottom view) (top view) 3.0 1.9 mc34166 step?down v in v o c o c in l c f rf r2 r1 d1 +? + ? + +
mc34166, mc33166 http://onsemi.com 10 4 2 1 5 3 + c f r f r 1 1.5 k c o 1000 v o 28 v/0.6 a r 2 ea reference thermal oscillator s r q pwm uvlo ilimit v in 12 v c in 330 + 6.8 k 4.7 k 0.47 q 1 d 1 1n5822 + *gate resistor r g , zener diode d 3 , and diode d 4 are required only when v in is greater than 20 v. l 190 h *r g 620 d 3 1n967a d 2 1n5822 q 2 mtp3055el d 4 1n4148 + + test conditions results line regulation v in = 8.0 v to 24 v, i o = 0.6 a 23 mv = 0.41% load regulation v in = 12 v, i o = 0.1 a to 0.6 a 3.0 mv = 0.005% output ripple v in = 12 v, i o = 0.6 a 100 mv pp short circuit current v in = 12 v, r l = 0.1 4.0 a efficiency v in = 12 v, i o = 0.6 a 82.8% l = coilcraft m1496?a or general magnetics technology gmt?0223, 42 turns of #16 awg on magnetics inc. 58350?a2 core. heatsink = aavid engineering inc. mc34166: 5903b, or 5930b mtp3055el: 5925b figure 21 shows that the mc34166 can be configured as a step?up/down converter with the addition of an external power mosfet. e nergy is stored in the inductor during the on?time of transistors q 1 and q 2 . during the off?time, the energy is transferred, with respect to ground, to the output filter capacitor and load. this circuit configuration has two significant advantages over the basic step?up converte r circuit. the first advantage is that output short?circuit protection is provided by the mc34166, since q 1 is directly in series with v in and the load. second, the output voltage can be programmed to be less than v in . notice that during the off?time, the inductor forward biases diodes d 1 and d 2 , transferring its energy with respect to ground rather than with respect to v in . when operating with v in greater than 20 v, a gate protection network is required for the mosfet. the network consists of components r g , d 3 , and d 4 . figure 21. step?up/down converter ? ? ? ? ? ? ? ? ????? ????? ????? ????? ????? ??? (top view) (bottom view) 3.45 1.9 figure 22. step?up/down converter printed circuit board and component layout mc34166 step?up/down v in v o c o c in l c f rf r2 r1 d1 +? + ? + + d3 d2 r g q2
mc34166, mc33166 http://onsemi.com 11 4 2 1 5 3 + c f r f r 2 3.3 k r 1 ea reference thermal oscillator s r q pwm uvlo ilimit v in 12 v c in 330 + 2.4 k 4.7 k 0.47 q 1 + c o 2200 v o ?12 v/1.0 a d 1 1n5822 l 190 h c 1 0.047 + + test conditions results line regulation v in = 8.0 v to 24 v, i o = 1.0 a 3.0 mv = 0.01% load regulation v in = 12 v, i o = 0.1 a to 1.0 a 4.0 mv = 0.017% output ripple v in = 12 v, i o = 1.0 a 80 mv pp short circuit current v in = 12 v, r l = 0.1 3.74 a efficiency v in = 12 v, i o = 1.0 a 81.2% l = coilcraft m1496?a or general magnetics technology gmt?0223, 42 turns of #16 awg on magnetics inc. 58350?a2 core. heatsink = aavid engineering inc. 5903b, or 5930b. two potential problems arise when designing the standard voltage?inverting converter with the mc34166. first, the switch output emitter is limited to ?1.5 v with respect to the ground pin and second, the error amplifier?s noninverting input is internally committed to the refer ence and is not pinned out. both of these problems are resolved by connecting the ic ground pin to the converter?s negative output as sh own in figure 23. this keeps the emitter of q 1 positive with respect to the ground pin and has the ef fect of reversing the error amplifier inputs. note that the voltage drop across r 1 is equal to 5.05 v when the output is in regulation. figure 23. voltage?inverting converter + + + + + + + + + + + + ??? ????? ????? ????? ????? ????? figure 24. voltage?inverting converter printed circuit board and component layout (bottom view) (top view) 3.0 1.9 mc34166 voltage-inverting v in v o c o c in l c f rf r2 r1 d1 +? + ? + + c1
mc34166, mc33166 http://onsemi.com 12 4 2 1 5 3 + v o1 5.05 v/2.0 a ea reference thermal oscillator s r q pwm uvlo ilimit v in 24 v 1000 + 6.8 k 68 k 0.1 1n5822 + 1000 1000 + 1000 + mur110 mur110 v o3 ?12 v/100 ma v o2 12 v/300 ma t1 + + tests conditions results line regulation 5.0 v 12 v ?12 v v in = 15 v to 30 v, i o1 = 2.0 a, i o2 = 300 ma, i o3 = 100 ma 4.0 mv = 0.04% 450 mv = 1.9% 350 mv = 1.5% load regulation 5.0 v 12 v ?12 v v in = 24 v, i o1 = 500 ma to 2.0 a, i o2 = 300 ma, i o3 = 100 ma v in = 24 v, i o1 = 2.0 a, i o2 = 100 ma to 300 ma, i o3 = 100 ma v in = 24 v, i o1 = 2.0 a, i o2 = 300 ma, i o3 = 30 ma to 100 ma 2.0 mv = 0.02% 420 mv = 1.7% 310 mv = 1.3% output ripple 5.0 v 12 v ?12 v v in = 24 v, i o1 = 2.0 a, i o2 = 300 ma, i o3 = 100 ma 50 mv pp 25 mv pp 10 mv pp short circuit current 5.0 v 12 v ?12 v v in = 24 v, r l = 0.1 4.3 a 1.83 a 1.47 a efficiency total v in = 24 v, i o1 = 2.0 a, i o2 = 300 ma, i o3 = 100 ma 83.3% t1 = primary: coilcraft m1496-a or general magnetics technology gmt?0223, 42 turns of #16 awg on magnetics inc. 58350-a2 core. t1 = secondary: v o2 ? 65 turns of #26 awg t1 = secondary: v o3 ? 96 turns of #28 awg heatsink = aavid engineering inc. 5903b, or 5930b. multiple auxiliary outputs can easily be derived by winding secondaries on the main output inductor to form a transformer. the secondari es must be connected so that the energy is delivered to the auxiliary outputs when the switch output turns off. during the off time, th e voltage across the primary winding is regulated by the feedback loop, yielding a constant v olts/t urn ratio. the number of turns for any given secondary voltage can be calculated by the following equation: # turns (sec) v o(sec) v f(sec) v o(pri) v f(pri) #turns (pri) note that the 12 v winding is stacked on top of the 5.0 v output. this reduces the number of secondary turns and improves lead regul ation. for best auxiliary regulation, the auxiliary outputs should be less than 33% of the total output power. figure 25. triple output converter
mc34166, mc33166 http://onsemi.com 13 v o +36 v/0.25 a d 1 l r 1 mur415 z 1 22 0.01 1n5822 mtp 3055e 2n3906 r 1 36 k r 2 5.1 k + 1000 v o r 1 r 2 4 2 1 5 3 + 0.22 470 k ea reference thermal oscillator s r q pwm uvlo ilimit q 1 *gate resistor r g , zener diode d 3 , and diode d 4 are required only when v in is greater than 20 v. v in ?12 v 1000 + 0.002 5.05 0.7 + + test conditions results line regulation v in = ?10 v to ? 20 v, i o = 0.25 a 250 mv = 0.35% load regulation v in = ?12 v, i o = 0.025 a to 0.25 a 790 mv = 1.19% output ripple v in = ?12 v, i o = 0.25 a 80 mv pp efficiency v in = ?12 v, i o = 0.25 a 79.2% l = coilcraft m1496?a or elmaco chk1050, 42 turns of #16 awg on magnetics inc. 58350?a2 core. heatsink = aavid engineering inc. 5903b or 5930b figure 26. negative input/positive output regulator 47 + 50 k faster brush motor 4 2 1 5 3 + ea reference thermal oscillator s r q pwm uvlo ilimit v in 18 v 1000 5.6 k 56 k 0.1 1n5822 + 1.0 k + + test conditions results low speed line regulation v in = 12 v to 24 v 1760 rpm 1% high speed line regulation v in = 12 v to 24 v 3260 rpm 6% figure 27. variable motor speed control with emf feedback sensing
mc34166, mc33166 http://onsemi.com 14 1000 t1 + + mc34166 step?down converter 0.001 0.001 output 1 mbr20100ct 1000 + + mc34166 step?down converter 0.001 0.001 output 2 mbr20100ct 1000 + + mc34166 step?down converter 0.001 0.001 output 3 mbr20100ct 0.01 rfi filter 100 3.3 1n4003 mje13005 220 0.047 1n4937 50 100k t 2 1n5404 115 vac t 1 = core and bobbin ? coilcraft pt3595 t 1 = primary ? 104 turns #26 awg t 1 = base drive ? 3 turns #26 awg t 1 = secondaries ? 16 turns #16 awg t 1 = total gap ? 0.002 t 2 = core ? tdk t6 x 1.5 x 3 h5c2 t 2 = 14 turns center tapped #30 awg t 2 = heatsink = aavid engineering inc. t 2 = mc34166 and mje13005 ? 5903b t 2 = mbr20100ct ? 5925b + + the mc34166 can be used cost ef fectively in of f?line applications even though it is limited to a maximum input voltage of 40 v. figure 28 shows a simple and ef ficient method for converting the ac line voltage down to 24 v. this preconverter has a total power rating of 125 w with a conversion efficiency of 90%. transformer t 1 provides output isolation from the ac line and isolation between each of the secondaries. the circui t self?oscillates at 50 khz and is controlled by the saturation characteristics of t 2 . multiple mc34166 post regulators can be used to provide accurate independently regulated outputs for a distributed power system. figure 28. off?line preconverter r , thermal resistance ja junction-to-air ( c/w) 30 40 50 60 70 80 1.0 1.5 2.0 2.5 3.0 3.5 0102030 25 15 5.0 l, length of copper (mm) p d(max) for t a = +50 c minimum size pad 2.0 oz. copper l l ???? ???? ???? ???? ja figure 29. d 2 pak thermal resistance and maximum power dissipation versus p.c.b. copper length
mc34166, mc33166 http://onsemi.com 15 table 1. design equations calculation step?down step?up/down voltage?inverting t on t off (notes 1, 2) v out v f v in v sat v out v out v f1 v f2 v in v satq1 v satq2 |v out | v f v in v sat t on t on t off f osc t on t off 1 t on t off f osc t on t off 1 t on t off f osc t on t off 1 duty cycle (note 3) t on f osc t on f osc t on f osc i l avg i out i out t on t off 1 i out t on t off 1 i pk(switch) i lavg i l 2 i lavg i l 2 i lavg i l 2 l v in v sat v out i l t on v in v satq1 v satq2 i l t on v in v sat i l t on v ripple(pp) i l 1 8f osc c o 2 (esr) 2 t on t off 1 1 f osc c o 2 (esr) 2 t on t off 1 1 f osc c o 2 (esr) 2 v out v ref r 2 r 1 1 v ref r 2 r 1 1 v ref r 2 r 1 1 1. v sat ? switch output source saturation voltage, refer to figure 8. 2. v f ? output rectifier forward voltage drop. typical value for 1n5822 schottky barrier rectifier is 0.5 v. 3. duty cycle is calculated at the minimum operating input voltage and must not exceed the guaranteed minimum dc (max) specification of 0.92. v out ? i out ? i l ? v ripple(pp) ? desired output voltage. desired output current. desired peak?to?peak inductor ripple current. for maximum output current especially when the duty cycle is greater than 0.5, it is suggested that i l be chosen to be less than 10% of the average inductor current i l avg . this will help prevent i pk(switch) from reaching the guaranteed minimum current limit threshold of 3.3 a. if the design goal is to use a minimum inductance value, let i l = 2 (i l avg ). this will proportionally reduce the converter?s output current capability. desired peak?to?peak output ripple voltage. for best performance, the ripple voltage should be kept to less than 2% of v ou t . capacitor c o should be a low equivalent series resistance (esr) electrolytic designed for switching regulator applications. the following converter characteristics must be chosen:
mc34166, mc33166 http://onsemi.com 16 package dimensions to?220 th suffix case 314a?03 issue e notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension d does not include interconnect bar (dambar) protrusion. dimension d including protrusion shall not exceed 0.043 (1.092) maximum. dim a min max min max millimeters 0.572 0.613 14.529 15.570 inches b 0.390 0.415 9.906 10.541 c 0.170 0.180 4.318 4.572 d 0.025 0.038 0.635 0.965 e 0.048 0.055 1.219 1.397 f 0.570 0.585 14.478 14.859 g 0.067 bsc 1.702 bsc j 0.015 0.025 0.381 0.635 k 0.730 0.745 18.542 18.923 l 0.320 0.365 8.128 9.271 q 0.140 0.153 3.556 3.886 s 0.210 0.260 5.334 6.604 u 0.468 0.505 11.888 12.827 ?t? seating plane l s e c f k j optional chamfer 5x d 5x m p m 0.014 (0.356) t g a u b q ?p? to?220 tv suffix case 314b?05 issue l v q k f u a b g ?p? m 0.10 (0.254) p m t 5x j m 0.24 (0.610) t optional chamfer s l w e c h n ?t? seating plane notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension d does not include interconnect bar (dambar) protrusion. dimension d including protrusion shall not exceed 0.043 (1.092) maximum. dim min max min max millimeters inches a 0.572 0.613 14.529 15.570 b 0.390 0.415 9.906 10.541 c 0.170 0.180 4.318 4.572 d 0.025 0.038 0.635 0.965 e 0.048 0.055 1.219 1.397 f 0.850 0.935 21.590 23.749 g 0.067 bsc 1.702 bsc h 0.166 bsc 4.216 bsc j 0.015 0.025 0.381 0.635 k 0.900 1.100 22.860 27.940 l 0.320 0.365 8.128 9.271 n 0.320 bsc 8.128 bsc q 0.140 0.153 3.556 3.886 s ??? 0.620 ??? 15.748 u 0.468 0.505 11.888 12.827 v ??? 0.735 ??? 18.669 w 0.090 0.110 2.286 2.794 5x d
mc34166, mc33166 http://onsemi.com 17 package dimensions to?220 t suffix case 314d?04 issue f ?q? 12345 u k d g a b1 5 pl j h l e c m q m 0.356 (0.014) t seating plane ?t? dim min max min max millimeters inches a 0.572 0.613 14.529 15.570 b 0.390 0.415 9.906 10.541 c 0.170 0.180 4.318 4.572 d 0.025 0.038 0.635 0.965 e 0.048 0.055 1.219 1.397 g 0.067 bsc 1.702 bsc h 0.087 0.112 2.210 2.845 j 0.015 0.025 0.381 0.635 k 0.977 1.045 24.810 26.543 l 0.320 0.365 8.128 9.271 q 0.140 0.153 3.556 3.886 u 0.105 0.117 2.667 2.972 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension d does not include interconnect bar (dambar) protrusion. dimension d including protrusion shall not exceed 10.92 (0.043) maximum. b1 0.375 0.415 9.525 10.541 b detail a?a b1 b detail a?a
mc34166, mc33166 http://onsemi.com 18 package dimensions d 2 pak d2t suffix case 936a?02 issue c 5 ref a 123 k b s h d g c e m l p n r v u terminal 6 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. tab contour optional within dimensions a and k. 4. dimensions u and v establish a minimum mounting surface for terminal 6. 5. dimensions a and b do not include mold flash or gate protrusions. mold flash and gate protrusions not to exceed 0.025 (0.635) maximum. dim a min max min max millimeters 0.386 0.403 9.804 10.236 inches b 0.356 0.368 9.042 9.347 c 0.170 0.180 4.318 4.572 d 0.026 0.036 0.660 0.914 e 0.045 0.055 1.143 1.397 g 0.067 bsc 1.702 bsc h 0.539 0.579 13.691 14.707 k 0.050 ref 1.270 ref l 0.000 0.010 0.000 0.254 m 0.088 0.102 2.235 2.591 n 0.018 0.026 0.457 0.660 p 0.058 0.078 1.473 1.981 r 5 ref s 0.116 ref 2.946 ref u 0.200 min 5.080 min v 0.250 min 6.350 min 45 m 0.010 (0.254) t ?t? optional chamfer *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 8.38 0.33 1.016 0.04 16.02 0.63 10.66 0.42 3.05 0.12 1.702 0.067 scale 3:1 mm inches on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800?282?9855 toll free usa/canada japan : on semiconductor, japan customer focus center 2?9?1 kamimeguro, meguro?ku, tokyo, japan 153?0051 phone : 81?3?5773?3850 mc34166/d literature fulfillment : literature distribution center for on semiconductor p.o. box 61312, phoenix, arizona 85082?1312 usa phone : 480?829?7710 or 800?344?3860 toll free usa/canada fax : 480?829?7709 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : http://onsemi.com order literature : http://www.onsemi.com/litorder for additional information, please contact your local sales representative.

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